About the Role
<h2>ASIC RTL Lead</h2><p>We are seeking an experienced <strong>ASIC RTL Lead</strong> with a strong background in RTL design and verification. The ideal candidate will have extensive experience in System Verilog and UVM, and will be responsible for leading the verification efforts for complex SOC designs.</p><h3>Key Responsibilities</h3><ul><li>Lead the development of test cases and test benches for SOC verification.</li><li>Oversee the verification of at least one SOC, ensuring high-quality results.</li><li>Work with various protocols including RISC-V, UCIE, PCIe, MIPI, DDR, and Ethernet.</li></ul><h3>Requirements</h3><ul><li>Strong expertise in System Verilog and UVM.</li><li>Experience in test case and test bench development.</li><li>Proven experience in SOC verification.</li><li>Knowledge of RISC-V, UCIE, PCIe, MIPI, DDR, and Ethernet protocols.</li><li>Bachelor's degree in Engineering (BE).</li></ul><h3>Work Arrangements</h3><ul><li>Type: Contract</li><li>Location: Bangalore, Karnataka, India</li><li>Remote work options are not specified.</li></ul>
Requirements
Benefits
Job Overview
- Posted
- 1/21/1970
- Experience
- mid
- Work Mode
- onsite
- Salary
- ₹12,00,000 - ₹20,00,000
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